发明名称 Decoder having a split queue system for processing instructions in a first queue separate from their associated data processed in a second queue
摘要 A split queue system for a decoder that supplies one or more micro-operations and data associated with the micro-operations. A main queue is coupled to receive one or more micro-operations from the decoder, and supply it to a next processing stage to provide a process micro-operation. A shadow queue is coupled to receive data associated with the micro-operation, in the same cycle that the micro-operation is supplied to the main queue. A control circuit is coupled to the main queue for issuing micro-operation from the main queue into the next processing stage in a first cycle, and in a second cycle issuing, the micro-operation therefrom. Also in the second cycle, the control circuit issues the data associated with the micro-operation from the shadow queue, so that the data is synchronized with its associated processed micro-operation.
申请公布号 US5668985(A) 申请公布日期 1997.09.16
申请号 US19940204992 申请日期 1994.03.01
申请人 INTEL CORPORATION 发明人 CARBINE, ADRIAN L.;BROWN, GARY L.;HOYT, BRADLEY D.;PARKER, DONALD D.;KUMAR, RAJESH
分类号 G06F9/22;G06F9/30;G06F9/38;(IPC1-7):G06F9/22 主分类号 G06F9/22
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