发明名称 |
Bus system for use with information processing apparatus |
摘要 |
A processor bus linked with at least a processor, a memory bus linked with a main memory, and a system bus linked with at least an input/output device are connected to a three-way connection control system. The control system includes a bus-memory connection controller connected to address buses and control buses respectively of the processor, memory, and system buses to transfer address and control signals therebetween. The control system further includes a data path switch connected to data buses respectively of the processor, memory, and system buses to transfer data via the data buses therebetween depending on the data path control signal.
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申请公布号 |
US5668956(A) |
申请公布日期 |
1997.09.16 |
申请号 |
US19950449088 |
申请日期 |
1995.05.24 |
申请人 |
HITACHI, LTD. |
发明人 |
OKAZAWA, KOICHI;KIMURA, KOICHI;KAWAGUCHI, HITOSHI;ABURANO, ICHIHARU;KOBAYASHI, KAZUSHI;MOCHIDA, TETSUYA |
分类号 |
G06F13/16;G06F12/00;G06F13/36;G06F13/40;(IPC1-7):G06F13/14 |
主分类号 |
G06F13/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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