摘要 |
Generally, ferroelectric memories produce loud array noise and consume large amounts of electric power because the VCC/2 precharging system which is widely adopted for DRAMs cannot be adopted for the ferroelectric memories. The characteristics of the memories deteriorate due to the fatigue and imprint of the ferroelectric capacitors. Therefore, a data line pair is precharged by using two voltages, VCC and VSS. As a result, the array noise can be reduced by symmetrically changing the voltages of data lines in a memory cell array MCA with respect to VCC/2. The power consumption of the memory can be reduced by redistributing electric charges to the data lines precharged with different voltages and by performing initial sensing operation and initial precharging operation. Inversion and noninversion of the ferroelectric capacitors in memory cells are alternately performed by switching the precharging voltage of each data line, thus reducing the fatigue and imprint.
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申请人 |
HITACHI, LTD.;HITACHI ULSI ENGINEERING CORP.;SAKATA, TAKESHI;SEKIGUCHI, TOMONORI;FUJISAWA, HIROKI;KIMURA, KATSUTAKA;ISODA, MASANORI;KAJIGAYA, KAZUHIKO |
发明人 |
SAKATA, TAKESHI;SEKIGUCHI, TOMONORI;FUJISAWA, HIROKI;KIMURA, KATSUTAKA;ISODA, MASANORI;KAJIGAYA, KAZUHIKO |