| 摘要 |
In the method according to the invention conductive electrodes are provided with the aid of a mask aligned with respect to at least two contact windows present in an insulating layer. First, layers of metal combining with semiconductor material, for example, Pt silicide, are provided in the contact windows. A narrow region of the insulating layer between the two contact windows may have a reduced dimension because in their extreme relative positions the conductive electrodes can only partially cover the contact windows. The invention also relates to semiconductor devices comprising logic (or low-noise) transistors, or transistors for very high frequencies whose structure is improved with respect to their dimensions, their series resistance value and/or their gain. |
