发明名称 SEISHIGAZOSAISEISOCHI
摘要 <p>PURPOSE:To simplify the device and to reduce the cost by allowing 1st and 2nd interpolation circuits of two systems to apply inter-frame interpolation to a luminance signal processing system and a chrominance signal processing system and using a 3rd interpolation circuit so as to apply inter-field interpolation thereby applying reproduction of a still picture of a MUSE video signal. CONSTITUTION:Signals S5, S6 are fed to low pass filters 41, 42 applying band limit of 12MHz in the luminance signal processing and the signal of 32MHz rate is converted into a signal of 24MHz rate by clock converters 43, 44 and signals S7, S8 are obtained. The output signals S7, S8 from the two systems of low pass filters 41, 42 and the clock converters 43, 44 are subject to inter-field interpolation by an interpolation circuit 45 according to an inter-field subsample phase and a still picture S9 of a luminance signal is reproduced. On the other hand, the chrominance signal processing does not require low pass filters and clock converters different from the luminance signal processing. Output signals S5, S6 of interpolation circuits 37, 38 are interpolated by an interpolation circuit 46 according to an inter-field subsample phase for a chrominance signal to reproduce the still picture S10 for the chrominance signal.</p>
申请公布号 JP2648382(B2) 申请公布日期 1997.08.27
申请号 JP19900094394 申请日期 1990.04.10
申请人 FUJITSU KK;NIPPON HOSO KYOKAI 发明人 OTOBE YUKIO;TAKAHASHI HIDENAGA;YOSHIDA MASAHIRO;NINOMYA JUICHI;IZUMI YOSHINORI;GOSHI SEIICHI
分类号 H04N9/00;H04N7/00;H04N7/015;H04N11/08;H04N11/24;(IPC1-7):H04N7/015 主分类号 H04N9/00
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