| 摘要 |
PURPOSE:To prevent a pseudo synchronizing by particularly monitoring an M synchronizing pattern, regarding a frame synchronizing establishing circuit. CONSTITUTION:This circuit is composed of a synchronizing bit detection circuit 1 detecting a synchronizing bit which coincides with two synchronizing patterns of an F synchronizing pattern and an M synchronizing pattern from each frame of input data and successively reading M synchronizing bits from the synchronizing bit at the same frame space, an M synchronizing bit counter 2 counting the M synchronizing bits, performing a reset when the number exceeds a prescribed number and outputting a reset signal shifting reading timing by one-bit, a count stoppage circuit 3 stopping the count operation of the M synchronizing counter 2 and an M synchronizing bit monitoring circuit 4 deciding whether '0' exists in the M synchronizing bits of a prescribed number or not, outputting a stoppage signal to the count stoppage circuit 3 if the '0' exists, deciding whether the M synchronizing bits of the pescribed number to be subsequently read coincides with a normal M synchronizing pattern or not and outputting a frame synchronizing establishing signal if they coincide. |
