发明名称 GAZOSHORISOCHINOGOKIKENSHUTSUHOSHIKI
摘要 <p>PURPOSE:To make a device smaller by executing selection of an initial deflected vector candidate by starting from high priority, step-wise. CONSTITUTION:An address for the initial deflected vector candidate with the highest priority is sent to a vector memory 63 by an address generating circuit 62, and the memory 63 sends the address to the circuit 62 as an initial deflected vector V1. The circuit 62 reads a previous picture based on the vector V1, inputs the address to the frame memory, a correlation detecting/optimum vector detecting circuit 61 compares the previous picture read from the memory with a separately inputted current picture notable block (x), and a correlation is detected. When the correlation is larger than a threshold value, the vector candidate is determined as V1. When it is smaller, a control signal is sent to the circuit 62 so as to read the vector candidate at the next highest priority. The initial deflected vector V1 is repeatedly obtained until the correlation becomes larger than the threshold value, the address to read the plural blocks on the previous picture in a searching range around the vector V1 is generated, and the optimum block VD is determined by the circuit 61. Thus, the device can be made smaller.</p>
申请公布号 JP2642160(B2) 申请公布日期 1997.08.20
申请号 JP19880213160 申请日期 1988.08.26
申请人 FUJITSU KK 发明人 OKAZAKI TAKESHI;KOSUGI YASUHIRO;MATSUDA KIICHI
分类号 H04N19/50;H04N19/105;H04N19/134;H04N19/137;H04N19/176;H04N19/192;H04N19/196;H04N19/423;H04N19/426;H04N19/51;H04N19/533;H04N19/56;H04N19/57;(IPC1-7):H04N7/32 主分类号 H04N19/50
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