| 摘要 |
PROBLEM TO BE SOLVED: To execute a processing at high speed by selecting optional bit data from respective shifter circuits. SOLUTION: Data DA and DB are respectively stored in the first FIFO device 221 and the second FIFO device 222 in correspondence. After that, the data DA and DB respectively outputted from the two FIFO devices 221 and 222 in correspondence are inputted to the first shifter circuit 241 and the second shifter circuit 242 in correspondence. Then, data stored in the first shifter circuit 241 is successively selected by an optional bit selecting circuit 25, taken-out and, after that, outputted to an arithmetic processing circuit (ALU) 16. Data stored in the second shifter circuit 242 is selected by the optional bit selecting circuit 25, taken-out and, after that, outputted to ALU 16. As against this, data stored over in the two shifter circuits 241 and 242 are selected by the optional bit selecting circuit 25, taken-out and, after that, outputted to ALU 16. |
