发明名称 Method for alignment of manufacturing semiconductor apparatus
摘要 This invention provides an alignment method in which alignment correction coefficients are calculated by a method of least squares in reference to the coordinates of each of the alignment marks and the coordinates of the rational grid points, corrected coordinates of the alignment marks from the coordinates of the rational grid points on the basis of the alignment mark correction coefficients and each of their statistical functions are calculated, the differences of these coordinates are calculated, the residuals at each of the alignment marks are calculated in reference to a difference between the alignment displacement tolerance values in the predetermined directions X and Y and their coordinates, and the corrected coordinates of the alignment marks associated with the first pattern for optically exposing the second pattern from the alignment mark correction coefficients and their random number elements when the residual sum of squares becomes a minimum value, thereby the most optimal correction of the alignment can be carried out even in the case that the random elements in the alignment mark displacement components from the rational grid point do not follow a normal distribution.
申请公布号 US5656402(A) 申请公布日期 1997.08.12
申请号 US19950517220 申请日期 1995.08.21
申请人 SONY CORPORATION 发明人 KASUGA, TAKASHI
分类号 G01B11/00;G03F9/00;H01L21/027;(IPC1-7):G03F9/00 主分类号 G01B11/00
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