发明名称 PACKET DATA RECORDER
摘要 PROBLEM TO BE SOLVED: To always and stably enable to record/reproduce using a time stamp. SOLUTION: A clock generation circuit 4 generates a synchronizing signal of a time reference that a system clock at an encoding time coincides with a frequency based on an input PCR(program time criterion reference value), and generates a lock flag showing its synchronizing state. A switch circuit 3 is switched by the lock flag, and supplies the input packet data to a recording time stamp addition circuit 8 only when a PLL in the clock generation circuit 4 is synchronized with the PCR of the input packet data, and interrupts the input to the recording time stamp addition circuit 8 to scrap the packet data when the PLL isn't synchronized with the PCR.
申请公布号 JPH09204738(A) 申请公布日期 1997.08.05
申请号 JP19960012478 申请日期 1996.01.29
申请人 VICTOR CO OF JAPAN LTD 发明人 SHINDO TOMOYUKI;OISHI TAKESHI
分类号 H04N5/92;G11B20/10;H04J3/06;H04L7/00 主分类号 H04N5/92
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