| 摘要 |
<p>PROBLEM TO BE SOLVED: To read out 'L' at higher speed. SOLUTION: Vcc is converted to V1 being lower than Vcc-Vth and higher than O.3V by a bias generation circuit BG. When a memory cell MC03 is selected, as a memory cell MC01 is DMOS, all memory cells of NAND including the MC01 are conducted, a potential of a bit line BiT0 is charged to the V1. Next, When a memory cell MCOO is selected, the bit line BiT0 is selected, but as the memory cell MC00 is EMOS, NAND is cut off from a power source, the bit line BiT0 is discharged, and is made 0.2V by feedback of a sense amplifier circuit SAMP. This potential is amplified by the amplifier and outputted to a data line.</p> |
