| 摘要 |
PROBLEM TO BE SOLVED: To make gate capacity that an output enable signal should drive irreducibly minimum by the minimum number of gate stage from an output enable signal and to remarkably shorten the transient time from a low impedance state to a high impedance state, as compared with conventional time. SOLUTION: The outputs of NAND circuits 2 and 12 inputting the inversion signals of complementary signals D and DB and an output enable signal OE drive N type MOS transistors 21 and 22 via blocks 10 and 20 including a BiNMOS inverter. First NMOS transistors 4 and 14 to be the transistors composing the BiNMOS inverter, third N type MOS transistors 5 and 15 performing gate inputs of output enable signals OE in second NMOS transistors 7 and 17 and fourth N type MOS transistors 8 and 18 are connected in parallel. |
