SYNCHRONIZATION CHECKING DEVICE FOR BUS

摘要

PROBLEM TO BE SOLVED: To simplify synchronization checking circuits provided inside respective processors and to reduce a hardware amount. SOLUTION: The respective processors 21 -2n are provided with a synchronization signal generation means 3 for generating signals to be synchronized with a bus cycle. Also, a bus acquisition notice signal output means 4 is provided inside the respective processors 21 -2n and reports it that a bus is to be used at the time of recognizing that the present processor acquires a system bus 1 by bus arbitration. The notice is performed through a signal line 7 for bus acquisition notice connected to all the processors 21 -2n in common. The synchronization error detection means 5 of the respective processors 21 -2n monitors the state change of the signal line for bus acquisition notice and checks the synchronization between the processor which acquires the bus and its own processor.