发明名称 PHASE LOCKED LOOP WITH CONTROLLABLE RESPONSE TIME
摘要 PROBLEM TO BE SOLVED: To obtain a phase locked loop whose response time is controlled selectively by arranging a phase detector and an amplifier for a feedback integration device in an integrated circuit. SOLUTION: A frequency of a local oscillator 911 is controlled by a PLL 919 consisting of a phase locked loop(PLL) integrated circuit(IC) 921, an external frequency reference crystal oscillator 923, and an external filter circuit network 925. The frequency of the local oscillator 911 is controlled by the PLL 919 according to data generated by a microprocessor 19. The filter circuit network 925 included in the PLL 919 incorporates a loop filter applying filtering processing to a phase error signal to generate a tuning control voltage for the local oscillator 911 from the phase error signal. The tuning control voltage is used to control an adjustable band pass filter and fed to the local oscillator 911. Furthermore, the tuning control voltage varies proportional to a frequency locked to the phase of the reference frequency by the PLL integrated circuit 923 to control the PLL response time.
申请公布号 JPH09200047(A) 申请公布日期 1997.07.31
申请号 JP19960346052 申请日期 1996.12.25
申请人 THOMSON KONSHIYUUMA ELECTRON INC 发明人 DEEBUITSUDO MAAKU BAJIYAA
分类号 H03L7/093;H03J1/00;H03J5/02;H03L7/107;H04L27/00;H04L27/233 主分类号 H03L7/093
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