| 摘要 |
PROBLEM TO BE SOLVED: To enhance frequency stability and to reduce power consumption by detecting a new frequency deviation, calculating frequency deviation correction data to make the frequency deviation zero and controlling an oscillated frequency of a master clock oscillation section. SOLUTION: A measurement control section 3 activates a frequency f0±Δf of a master clock for t-sec for the measurement by a frequency measurement section 2. The newest measurement value (c) and the result of measurement measured for the t-sec when the frequency deviation ±Δf detected by a frequency deviation detection section 4 is zero are subject to subtractor processing to detect the newest frequency deviation ±Δfd. Then a correction table 5 is used to calculate frequency deviation correction data to make the frequency deviation ±Δf zero, an oscillated frequency control section 6 converts the data into the frequency control signal to control the oscillating frequency of a master clock oscillation section 1 so as to make the frequency deviation ±Δf zero. The frequency deviation ±Δf of the master clock oscillation section is reduced by repeating the operation to enhance the frequency stability and to reduce the power consumption. |
