发明名称 High density gate array cell architecture
摘要 <p>A gate array cell architecture is provided with routing tracks at variable track pitches, thereby increasing the density of the architecture. Orientation of the devices in the gate cells perpendicularly to the routing tracks in the second metallization layer provides an increased porosity in this layer. The orientation allows an N channel device to be made smaller than a P channel device within a gate cell, to provide balanced devices. The perpendicular orientation also provides more contact points for source or drain. When the mulitple contacts are used to connect the device to a power source, the multiple contacts reduce the effective resistance and increase the reliability of the devices.</p>
申请公布号 EP0782188(A2) 申请公布日期 1997.07.02
申请号 EP19960120591 申请日期 1996.12.20
申请人 LSI LOGIC CORPORATION 发明人 PARK, JONATHAN C.
分类号 H01L27/092;H01L21/82;H01L21/8238;H01L23/528;H01L27/118;(IPC1-7):H01L23/528 主分类号 H01L27/092
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