发明名称 DELAY MINIMIZATION FOR CIRCUIT EMULATION OVER PACKET SWITCHED (ATM) NETWORKS
摘要 A method of minimizing throughput delay in constant-bit-rate services carried over packet-based networks subject to variable delays, comprises, in one embodiment, the steps of receiving incoming packets in a buffer, reading out bits from the buffer at a clock frequency (fi), continually monitoring the buffer fill level (Li), determining the maximum fill level (Lmaxj) over a plurality of successive samples, determining the minimum fill level (Lmink) over a plurality of successive samples, adjusting the clock frequency (fi) to cause the maximum fill level (Lmaxj) to tend toward a target value (TargetLmax), and adaptively changing said target value (TargetLmax) so that the minimum fill level (Lmink) tends toward a predetermined set-point. The rate of change of the target value (TargetLmax) is significantly slower than the rate of adjustment of clock frequency. The invention can be applied to other types of clock recovery.
申请公布号 CA2240678(A1) 申请公布日期 1997.06.26
申请号 CA19962240678 申请日期 1996.12.19
申请人 NEWBRIDGE NETWORKS CORPORATION;COX, NEIL;BODELL, KENT 发明人 COX, NEIL;BODELL, KENT
分类号 H04L12/56;H04Q11/04;(IPC1-7):H04L12/56 主分类号 H04L12/56
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