发明名称 PACKET PROCESSING SYSTEM, COMMUNICATION PROCESSING UNIT AND PACKET EXCHANGE
摘要 <p>PROBLEM TO BE SOLVED: To attain the operation in a single clock speed series without complicated switch operation by processing an internal cell outputted by a cell length conversion means in the communication processing unit. SOLUTION: Input output transmission line interfaces 111, 112 adopt a transmission format of G.707-709 and a structure of cells with a header length of 5B and an information field length of 48B in total 53-bit configuration. The ATM exchange applies write/read control to a reception cell buffer 21 installed in a receiver side transmission interface section 2 and a transmission cell buffer 41 installed to a transmitter side transmission interface section 4 to convert a cell stream on an input output transmission line into an internal cell string for internal highways 121, 122 for header length of 6B and an information field length of 48B in total 54-bit configuration and uses a switch section 3 to convert the cell unit in the unit of the internal cells.</p>
申请公布号 JPH09168022(A) 申请公布日期 1997.06.24
申请号 JP19960324993 申请日期 1996.12.05
申请人 HITACHI LTD 发明人 GOHARA SHINOBU;TORII YUTAKA
分类号 H04Q3/00;H04L12/28;(IPC1-7):H04L12/28 主分类号 H04Q3/00
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