| 摘要 |
<p>PURPOSE: To improve the circuit integration and the operating speed by allowing a means B employing a bipolar element to convert a logic level resulting from converting an input signal by a logic means A into a high current and allowing a means C between the means A and B to quicken a discharge time of the means B. CONSTITUTION: A logic means 31 consisting of two CMOS inverters converts a signal from an input terminal 34 into a signal of a logic level and it is fed to a speed improvement logic means 32 and a large current drive means 33 via a path 35. A signal from a common connection gate of CMOS elements M5, M6 having a high input impedance characteristic and being component of the means 32 is given to a TR Q3 of the means 33 via a path 36. Since the discharge path of the TR Q3 is made up of the element M6, the time constant at a discharge state is reduced, the discharge speed is quickened thereby quickening the operation of the means 33. Thus, the M6 is used in place of a resistor to make the size of the means 32 small and then the circuit integration degree and the operating speed of the circuit of the device providing an output of a high drive current to an output terminal 37 are improved.</p> |
