| 摘要 |
The partial response trellis decoder of HDTV(High Definition Television) includes the distance mapper(49) which outputs by computing the euclidean distance(d0,d1,d2,d3) by inputting the output signal from the post-comb, the viterbi decoder(50) that outputs 1 byte at a time by viterbi decoding the euclidean distance(d0,d1,d2,d3) which outputted from the distance mapper, the delay part(51,52,53) that forms the current state and the next state by delaying the outputted data from the viterbi decoder in 3 steps, the ruler selector(54) which selects the ruler type according to the transition of the current state and the next state which formed at the delay part, and the slicer that outputs 1 byte by slicing the input signal and the distance mapper from the post-comb by the selected ruler type from the ruler selector. |
