| 摘要 |
An array reading or addressing circuit which enables the signals stored in an array of electrical elements to be individually read and which reduces the number of connections to the array of electrical elements. The circuit includes a plurality of terminals (32), each terminal being connected to a signal reading device (30) or address signal generating device (31) through a respective switch (S). The elements (12) of the array are each connected to a unique combination of the terminals, and when a combination of switches (S) are in a conducting state, electrical signals of a combination of electrical elements are fed to the signal reading device (30), or addressed by the address signal. The output signals for different switch combinations, which each represent combinations of pixel values, are processed to enable the signal from each electrical element to be determined.
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