| 摘要 |
<p>A highly symmetrical bi-directional current source (18) biased between first and second (Vdd, Gnd) supply voltages in CMOS FET technology comprises an current generator (11') which includes an innovative circuit (19) and a standard switching circuit (12). The switching circuit consists of two pairs of complementary FET devices that are paralleled with a unity gain operational amplifier connected between their common nodes. In a first branch, a diode-connected PFET device (T1) and a current supply (13) are connected in series as standard to generate a reference current (Iref) as standard. The second branch includes the standard first mirroring device (T3), first and second resistively-connected complementary devices (T10,T11) with an intermediate node (20) coupled therebetween and a second mirroring NFET device (T12) are all connected in series. The third branch is formed by first (T2) and second (T5) output FET devices with said switching circuit connected between their drains to select either the source or the sink current to be outputted at the output node (14) as the output current (Iout). By designing the type and the size of corresponding devices in the second and third branches to be substantially the same, an excellent impedance matching can be obtained therebetween. Said innovative circuit further includes an operational amplifier based circuit (OP2, R) whose positive input is connected to said intermediate node, its negative input is connected to one (15) of said common node and the output is connected to the node (21) formed by the gates of said second mirroring and output devices so that there is no potential difference between its inputs. <IMAGE></p> |
