Integrated circuit memory device with balancing circuit including follower amplifier coupled to bit line

摘要

In reading circuits for memories in integrated circuit form, notably non-volatile memories, a differential amplifier for reading the memory cell is connected to a precharged bit line and a reference line. A balancing device balances the potentials of the bit line and reference line, and the corresponding inputs to the differential amplifier, before the reading phase of the circuit. The balancing device includes a follower amplifier having an input connected to the differential amplifier and an output connected to the bit line to inject a load current to the bit line during a balancing phase of the reading circuit.