发明名称 |
Method and apparatus for generating an asynchronously clocked signal in a synchronously clocked programmable device |
摘要 |
A method and apparatus for generating an asynchronously clocked signal in a synchronously clocked programmable device is described. A programmable logic device having synchronously clocked or product term clocked registers receives an input signal and an event signal. The input signal and the event signal can be any externally or internally generated signals. The event signal signifies the occurrence of a particular event by transitioning from one signal state to another. The input signal is asynchronously clocked through the synchronously clocked PLD without utilizing the synchronously clocked or product term clocked registers. The input signal is asynchronously clocked in response to an edge transition of the event signal. The edge transition of the event signal being either a failing edge or a rising edge.
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申请公布号 |
US5638008(A) |
申请公布日期 |
1997.06.10 |
申请号 |
US19950550165 |
申请日期 |
1995.10.30 |
申请人 |
CYPRESS SEMICONDUCTOR CORP. |
发明人 |
RANGASAYEE, KRISHNA;LARCHER, PHILIPPE |
分类号 |
H03K19/177;(IPC1-7):H03K19/177 |
主分类号 |
H03K19/177 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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