发明名称 Method of manufacturing semiconductor device having multilevel interconnection structure
摘要 A semiconductor device has a multilayered structure that includes an insulating interlayer formed on a lower wiring layer, a semiconductor substrate, and a via hole. The semiconductor device is manufactured by a method that includes plasma etching at least one surface of the insulating interlayer the in an atmosphere having as a major component either a carbonless, chlorine-based gas or a carbonless, chlorine-based gas and an inactive gas in order to remove contaminates that would otherwise promote reactivity with aluminum CVD on the surface of the insulating interlayer.
申请公布号 US5637534(A) 申请公布日期 1997.06.10
申请号 US19930172717 申请日期 1993.12.27
申请人 KAWASAKI STEEL CORPORATION 发明人 TAKEYASU, NOBUYUKI;YAMAMOTO, HIROSHI;KAWANO, YUMIKO;KONDOH, EIICHI;KATAGIRI, TOMOHARU;OHTA, TOMOHIRO
分类号 H01L21/768;H01L23/522;H01L23/532;(IPC1-7):H01L21/44 主分类号 H01L21/768
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