| 摘要 |
PROBLEM TO BE SOLVED: To reduce power consumption by connecting a low potential power source node of memory cell to a common artificial ground line and changing over this artificial ground line to the low level voltage or high level voltage for holding the memory cell information depending on the signal for selecting the bit line. SOLUTION: In the memory cells on the non-selected bit lines among the activated memory cells, the source voltage of the transistors TRQ3 and TRQ4 in the memory cell 1 become high since the artificial ground line is connected to the high voltage source 4. TRQ4 is in the conductive condition but the gate- to-source voltage is reduced and thereby a conductive resistance becomes high. As a result, a current flowing into the memory cell from the bit line via TRQ6 and TRQ4 is reduced to realize low power consumption. Meanwhile, the artificial ground line in the memory cells on the selected bit lines among the activated memory cells is connected to the low voltage line 5 and the source voltage of the TRQ3, TRQ4 in the memory cell becomes low. The gate-to-source voltage of TRQ3 becomes near 0V, resulting in non-conductive condition. |
