| 摘要 |
<p>A frequency synthesizer loop (200) includes a first voltage controlled oscillator (201) and a first divider circuit (202) for dividing a frequency of an output signal generated by the first voltage controlled oscillator (201) by a factor of N. The synthesizer loop (200) further includes a phase/frequency detector circuit (203), a loop filter circuit (204), a summing circuit (206), a feedforward amplifier (205), a second voltage controlled oscillator (207), and a second divider circuit (208), wherein the second divider circuit (208) divides a second output signal generated by the second voltage controlled oscillator (207) by a factor of M, and a microprocessor (210) varies the value of M to keep the first voltage in the middle of a range of the second voltage controlled oscillator (207).</p> |
