发明名称 ATM data cell transmission system
摘要 <p>The system includes first and second memories (1,4), an extraction circuit (14) and a memory management circuit (5). The first memory temporarily stores an input cell, manages a cell row address and in response to the input of the cell row address, transmits the stored cell to this address. The second memory stores the cell row address provided by the first memory and transmits the read cell to the first memory. The extraction circuit uses an address corresponding to a booking time to send the cell as an output address to extract a first address available after the booking time of the second memory. The management circuit writes the cell row address of the first memory at the address available in the second memory.</p>
申请公布号 FR2741497(A1) 申请公布日期 1997.05.23
申请号 FR19960013810 申请日期 1996.11.13
申请人 NEC CORPORATION 发明人 KAGANOI TERUO
分类号 H04Q3/00;G11C15/04;H04L12/815;H04L12/863;H04Q11/04;(IPC1-7):H04L29/02 主分类号 H04Q3/00
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