Method for planarization of semicondoctor device

摘要

In a method for planarizing a semiconductor device, an interlevel insulating layer 17, e.g. of silicon dioxide, and a layer for the planarization 18, e.g. of BPSG, containing dopants therein are formed on a semiconductor substrate. The dopants are diffused out of the layer 18 by a first thermal annealing step. Afterwards, the layer 18 is flowed by a second thermal annealing step, and thermal oxide is formed thereon as a passivation layer (19). Such a method avoids precipitation of the dopants after annealing.