发明名称
摘要 PURPOSE:To reduce the necessary pattern area and miniaturize a chip wherein a semiconductor integrated circuit is formed, by connecting a silicon substrate and a resistor of polycrystalline silicon by using the same aperture part, CONSTITUTION:A diode 2 and a holding resistor 3 are formed in an element region surrounded by an isolation region 15 which penetrates an N<+> buried diffusion layer 12 and an N<-> epitaxial layer 13 formed on a silicon substrate 11 and reaches the silicon substrate 11. The resistor 3 is formed of a polycrystalline silicon layer 17 stretching from the outside of the element region, and a Schottky barrier diode 2 is formed by using the N<-> epitaxial layer 13 and Pt-Si films 19, 20 formed thereon. The resistor 3 and the diode 2 are connected with a common metal wiring 22 in the same region. Barrier 21 like Pt-W is formed between the polycrystalline silicon layer 17 for the resistor and the Pt-Si film 19 and between the Pt-Si film 20 and the metal wiring 22. By arranging, in this manner, the leading-out part of the polycrystalline silicon layer 17 for the holding resistor 3 in the same aperture part as the forming region of the diode 2, the mutual connection region are remarkably integrated.
申请公布号 JP2611443(B2) 申请公布日期 1997.05.21
申请号 JP19890217930 申请日期 1989.08.23
申请人 发明人
分类号 H01L27/04;H01L21/822;H01L21/8222;H01L21/8229;H01L27/06;H01L27/102;H01L29/47;H01L29/872 主分类号 H01L27/04
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