发明名称 |
Power-supply-voltage reduction device, semiconductor integrated circuit device including the reduction device and method of producing electronic device including such devices |
摘要 |
A power-supply-voltage reduction device including a voltage reduction circuit which has a plurality of transistors and a voltage control circuit. The plurality of transistors have first current electrodes to be supplied with an external power supply voltage, control electrodes receiving a control signal and second current electrodes which are connected together to an output port, the second current electrodes producing a reduced power supply voltage which is generated from the external power supply voltage according to the control signal, at the output port. The voltage control circuit generates the control signal based on a comparison of the reduced power supply voltage and a reference voltage, and controls at least one of the plurality of transistors so as to maintain the reduced power supply voltage substantially to a level of the reference voltage. Since this power-supply-voltage reduction device is constructed with the plurality of transistors for a low external power supply voltage, this device may have a sufficient current supply ability to achieve a stable operating speed and a stable reduced supply voltage.
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申请公布号 |
US5631547(A) |
申请公布日期 |
1997.05.20 |
申请号 |
US19950377588 |
申请日期 |
1995.01.24 |
申请人 |
FUJITSU LIMITED |
发明人 |
FUJIOKA, SHIN-YA;TAGUCHI, MASAO |
分类号 |
G11C11/407;H01L21/82;H01L21/822;H01L27/02;H01L27/04;(IPC1-7):H01L21/00 |
主分类号 |
G11C11/407 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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