发明名称 METHOD FOR FORMING INTEGRATED CIRCUIT AND SYSTEM FOR INSPECTING DIE ON WAFER
摘要 <p>PROBLEM TO BE SOLVED: To provide an improved method for forming an integrated circuit. SOLUTION: A die is manufactured as 'flip chip' by use of conventional technique and the manufactured die is inspected by an inspection system. Only a sub set of contact pad 201 is used at an inspection process. In a perffered embodiment, each pad of sub set on a flip chip is connected to a probe pad around a flip chip device by metallization or by another method. These probe pads are used in an inspection device and a selected signal is given to the device and the performance is inspected.</p>
申请公布号 JPH09127188(A) 申请公布日期 1997.05.16
申请号 JP19960260560 申请日期 1996.10.01
申请人 ARUTERA CORP 发明人 RICHIYAADO JII KURIFU
分类号 G01R31/26;H01L21/66;H01L21/822;H01L23/58;H01L27/04;(IPC1-7):G01R31/26 主分类号 G01R31/26
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