| 摘要 |
PROBLEM TO BE SOLVED: To provide a clock signal distributing device capable of suppressing the occurrence of a clock skew almost similarly to equal length wiring and attaining fault resistance. SOLUTION: Clock signal output devices 301, 302 respectively provided with oscillators 303, 304 for generating reference clock signals and waveform converters 310, 311 for generating signals having prescribed waveforms based upon the reference clocks generated from the oscillators 303, 304 are respectively connected to one end of a positive phase transmission line 104 and one end of a reverse phase transmission line 103. When a fault is generated in either one of the output devices 301, 302, the distribution of clock signals to respective substrates is continued by a signal generated from the other clock signal output device. |
