| 摘要 |
PROBLEM TO BE SOLVED: To reduce a chip size and accelerate the fall speed of the output voltage by forming a Zener diode and second MOS transistor in the same second region to reduce the occupied area of the Zener diode. SOLUTION: First MOS transistor 101 having a drain to receive a high power voltage and a source to feed an output voltage is provided on a first region IR1 on a semiconductor substrate 10. On a second region IR2 are provided a Zener diode 105 having an anode connected to the source of the MOS transistor 101 and a cathode connected to the gate thereof and a second MOS transistor 103 having a drain connected to the gate of the first MOS transistor 101 and a grounded source. Thus, both the diode 105 and transistor 103 are formed in the same region IR2, thereby allowing the chip size to be reduced. |
