发明名称 System management shadow port
摘要 A device and method for transferring data, address and status information concerning a former I/O bus cycle before a system management interrupt is initiated. A plurality of system management shadow registers samples information from a system bus. Such information is obtained by a register accessing the plurality of system management shadow registers through a common shadow port.
申请公布号 US5630147(A) 申请公布日期 1997.05.13
申请号 US19960601697 申请日期 1996.02.15
申请人 INTEL CORPORATION 发明人 DATTA, SHAM;JOSHI, JAYESH;KARDACH, JAMES P.
分类号 G06F1/32;(IPC1-7):G06F11/00 主分类号 G06F1/32
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