Method of manufacturing a wiring layer for use in a semiconductor device having a plurality of conductive layers

摘要

An electrode wiring layer of a semiconductor device according to this invention includes a first conductive portion formed of polycrystalline silicon or the like, and second conductive portions formed as refractory metal silicide layers on opposite lateral walls of the first conductive portion. Upper surfaces and lateral surfaces thereof are coated with insulating layers formed in separate processes. The insulating layers covering the lateral surfaces in particular are formed by a self-aligning technique requiring no mask process. Where conductive layers are formed over the wiring layer according to this invention, a film forming and patterning process for insulating the conductive portions of the wiring layer is omitted and insulation of the wiring layer is secured.