| 摘要 |
PROBLEM TO BE SOLVED: To reduce the power consumption of an A/D converter and the number of delay elements by providing a second changeover switch for switching and outputting symbol clocks outputted from a digital phase locked loop and supplying them to the two A/D converters and a flip-flop when burst detection signals indicate desired wave input, etc. SOLUTION: A phase detection circuit 3 performs the arithmetic operation of obtaining the arc tangent of inputted I and Q signals or the like and outputs a phase angle θ. The phase angle θis delayed for one sample or one symbol by clocks selected by a changeover switch 9 in the slip-flop 5 and delay detection is performed in an adder 6. Then, input to a DPL 7 is performed at the time of a sample rate operation and the input to a judgement circuit 8 is performed at the time of a symbol rate operation. Thus, at the time of the symbol rate operation while desired reception input is present, since the A/D converters 1 and 2 are operated only once in one symbol, the power consumption is reduced. |
