| 摘要 |
A large-area electronic device such as, e.g., a large-area image sensor or flat panel display comprises thin-film drive circuitry including inverters each comprising a driver TFT (M1), a load TFT (M2) and a bootstrap capacitor (Cs). Most TFT types which may be used to fabricate the transistors (M1 and M2) have a high parasitic gate capacitance due, inter alia, to overlap of the gate electrode (g) with their source and drain electrode (21 and 22). This parasitic capacitance degrades the inverter gain Av by coupling between the output line (O/P) of the inverter and the gate electrode (g) of its load device (M2) and an excessively large capacitor (Cs) is required to overcome this degradation. The present invention uses a reduction in the transconductance (gm2) of the load TFT (M2) to permit a reduction in the size of the boot strapping capacitor (Cs) to within practical limits, while still obtaining a desirably high gain Av from the inverter in spite of the parasitic capacitances. A factor mu .C in gm 2 of the load TFT (M2) is reduced for this purpose, for example by having a gate dielectric (24) of greater thickness (t2) or lower dielectric constant, and/or a lower crystallinity or amorphous material ( alpha -Si) for the channel region (206). These same different materials or thicknesses as used for the driver and load TFTs (M1 and M2) may also be used to advantage in the bootstrap capacitor (Cs) and in a switch (M3) for the capacitor (Cs). |
