发明名称 Delay-type FM demodulation circuit
摘要 <p>A delay-type FM demodulation circuit of this invention has an object to satisfactorily remove a harmonic wave in an arithmetic calculation output signal even if an LPF having relatively moderate stopping characteristics is used. The delay-type FM demodulation circuit includes first to third delay circuits (12 - 14) for obtaining first to third signals (S13 - S15) obtained by times (e.g., 1/8, 1/4, and 3/8) which sequentially increase within a time shorter than 1/2 which is a signal period obtained when an FM-modulated input signal (S12) is positively deviated by a maximum frequency, a first multiplication circuit (15) for multiplying the input signal and the first signal, a second multiplication circuit (16) for multiplying the second signal and the third signal, and an addition circuit (17) for adding an output signal (S16) from the first multiplication circuit and an output signal (S17) from the second multiplication circuit. &lt;IMAGE&gt;</p>
申请公布号 EP0769846(A2) 申请公布日期 1997.04.23
申请号 EP19960116777 申请日期 1996.10.18
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 ADACHI, MICHIHIRO
分类号 H03D3/00;H03D3/06;(IPC1-7):H03D3/06 主分类号 H03D3/00
代理机构 代理人
主权项
地址
您可能感兴趣的专利