ADDRESS TRANSFORMATION IN A CLUSTER COMPUTER SYSTEM

摘要

To integrate a plurality of processors (11-14), each capable of directly addressing a limited internal storage range, with a large external memory, processors are organized into clusters, each having a plurality of processors and a common secondary cache (7). An address translator (18) is provided to transform internal main memory space (8) addresses to external memory space addresses. External memory space is divided into private and shared areas. An internal address indicator bit, in conjuction with the cluster number form a requesting processor primary cache, is employed to set up the transformation either to the private external space of the cluster or the shared external space. In reverse external-to-internal transformation, a pair of indicator bits are used to generate the internal address and define the shared and private space of the designated cluster. A cluster member number assigned to each processor is used by the secondary cache to track with processor sends/receives information to/from the external memory.