Silicon carbide semiconductor device, e.g. vertical high power MOSFET

摘要

The device includes a semiconductor substrate (4) having a low resistance n-type semiconductor layer (1), a high resistance n-type semiconductor layer (2), and a p-type semiconductor layer (3). Also provided are two electrode layers (15,16). A highly doped n-type region (6) is provided in a predetermined position on the p-type layer and a trench (9) is formed in this region which extends down to the high resistance substrate layer. A layer of silicon carbide (11a) extends over the surface of the n-type region, the p-type layer, and the high resistance layer along the sidewall (9a) of the trench. A gate isolation film (12) and a gate electrode layer (13) are provided on the silicon carbide layer in the trench and one electrode layer (15) extends over a section of the n-type region and optionally on the surface of the p-type layer. The other electrode layer (16) extends over the surface of the low resistance substrate layer.