Semiconductor memory with high velocity read-out

摘要

The read-out amplifiers are divided in several groups for preventing the peak current value used by read-out amplifiers in a memory with a high velocity read-out of data of various words at addresses, with the top bits coinciding with those of a read-out address. The division is carried out on changing the top bits w.r.t. a previous read-out address. A group of such read-out amplifiers for data words, including a word indicated by a read-out address, is first activated, while the other groups are so controlled as to be slightly delayed according to the logic of the read-out address lower bits, on changing the top ones.