| 摘要 |
PROBLEM TO BE SOLVED: To improve operating speed, to reduce power consumption and to eliminate the effects of noises by detecting the fall of bit line potential and abruptly reducing the bit line potential. SOLUTION: When the precharge clock PRE becomes a low level, the transistor P01 is made on and N01 is made off to raise the potential level of the bit line. When the potential exceeds a specified value, the potential of the output terminal OUT changes from 'high' to 'low'. Succeedingly when the potential of the BIT rises, the PRE level changes from 'low' to 'high' to make the P01 off. After that, if the data held by the selected memory cell Mcm is at the low level, charge is extracted from the BIT. When the potential of the BIT falls to the threshold level of the sense amplifier SA, the out signal of this amplifier changes to the high level. Accordingly two input signals of the AND circuit both become the high level and raise the potential of the output point P06 to the high level and the N01 is made on to extract the charge of the BIT abruptly to bring the BIT to the low level. |
