发明名称 |
Output power control in burst transmitters. |
摘要 |
Output power control in burst transmitters that comprise a power amplifier stage the gain of which varies according to a power control signal (PCS), an output signal sensing circuit (PS), a detector (DET) that generates a DC voltage signal proportional to the level of the sensed signal and a comparator (COMP) to generate the power control signal (PCS) in proportion to the difference between the DC voltage coming from the detector (DET) and a reference voltage (Vref). The power control signal (PCS) is sampled in a sample-and-hold circuit (SHC) using the active edges of a clock signal (CS), these occurring only at the moments when there are signal bursts to be transmitted and at a time subsequent to the start of each burst greater than the duration of the transient of the DC analogue voltage signal at the output of the detector. |
申请公布号 |
ZA9606509(B) |
申请公布日期 |
1997.02.19 |
申请号 |
ZA19960006509 |
申请日期 |
1996.07.31 |
申请人 |
ALCATEL STANDARD ELECTRICA, S.A. |
发明人 |
EDUARDO BONILLA MENEDEZ;ANTONIO DEL PINO JUAREZ;JUAN ANTONIO YUSTE HERNANDEZ |
分类号 |
H03G3/30 |
主分类号 |
H03G3/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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