发明名称 |
DATA PROCESSING WITH MULTIPLE INSTRUCTION SETS |
摘要 |
A data processing system is described utilising two instruction sets. Both instruction sets control processing using full N-bit data pathways within a processor core 2. One instruction set is a 32-bit instruction set and the other is a 16-bit instruction set. Both instruction sets are permanently installed and have associated instruction decoding hardware 30, 36, 38. |
申请公布号 |
EP0758464(A1) |
申请公布日期 |
1997.02.19 |
申请号 |
EP19950908327 |
申请日期 |
1995.02.15 |
申请人 |
ADVANCED RISC MACHINES LTD. |
发明人 |
JAGGAR, DAVID VIVIAN |
分类号 |
G06F9/30;G06F9/318;G06F9/38;G06F15/00;(IPC1-7):G06F9/318 |
主分类号 |
G06F9/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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