发明名称 PACKAGE FOR SEMICONDUCTOR DEVICE USE
摘要 PROBLEM TO BE SOLVED: To inhibit the generation of a warpage of a package, which is caused by the heat history of the package, and to prevent increase in the heat resistance of the package, which is caused by the intermediate layer of the package, from being generated by a method wherein a through hole formed in the third layer held between first and second layers is filled with a first material which forms the first layer. SOLUTION: This package has Cu layers 11 and 12 and an intermediate layer (an Mo layer, a CuW layer or the like) 13 inserted between these layers 11 and 12. An FET 14 which is a heating element, chip capacitors 15, circuit boards 16 and the like are mounted on the upper surface of the Cu layer 11. Moreover, ceramic walls 18 for fixing lead wires 17 are mounted on the upper surface of the layer 11. A through hole 19 is formed on the layer 13 of the package and this hole 19 is filled with a Cu buried layer 20. This hole 19 is provided in a state corresponding to the components mounted on the package, specially the FET 14 which generates an intense heat.
申请公布号 JPH0945828(A) 申请公布日期 1997.02.14
申请号 JP19950194601 申请日期 1995.07.31
申请人 NEC CORP 发明人 TOKUNAGA KAZUNAO
分类号 H01L23/373;H01L23/06;H01L25/07;H01L25/18;(IPC1-7):H01L23/373 主分类号 H01L23/373
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