| 摘要 |
PROBLEM TO BE SOLVED: To enable a semiconductor device to be lessened in thickness and wiring resistance between a semiconductor chip and a sub-circuit board, wherein the semiconductor device is equipped with a sub-circuit board so as to substantially enhance the bumps of the semiconductor chip in size and arrangement pitch. SOLUTION: Gold bumps 46 formed under a connection pad 43 of a semiconductor chip 41 are directly bonded to a gold plating layer 33 formed on a first connection pad 22 of a sub-circuit board 21, so that a semiconductor device is lessened in wiring resistance. The gold bumps 46 are comparatively high and set as high as 10 to 80μm, preferably 20 to 40μm after they are bonded. The reason why the bumps 40 are set comparatively high is that a resin sealing material 51 is easily embedded between the upside of the sub-circuit board 21 and the underside of the semiconductor chip 41 caused by a capillary phenomenon. In this case, though the gold bumps 46 are set comparatively high, a gap between the upside of the sub-circuit board 21 and the underside of the semiconductor chip 41 is stopped up with resin sealing material 51, so that a semiconductor device of this constitution can be lessened in thickness.
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