发明名称 MEMORY DEFECT ANALYZER FOR SEMICONDUCTOR MEMORY TESTER
摘要 <p>To count the fails in a fail memory (250) with a semiconductor memory tester, data of a plurality of bits are read from the memory (250) and the fails are counted in parallel, thus shortening the time taken to count the fails. A counter for counting the fails of a fail memory has a fail memory block (358) and a fail counter (360). In performing MUT measurement, the fail memory block (358) is regarded as a single memory and data are written therein; in counting fails, the fail memory block (358) is divided into M sub-blocks and M bits of data are read parallel. The M-bit data are inputted into the fail counter (360). The number of logical high or low levels of the data is encoded into binary code data and counted by the fail counter (360).</p>
申请公布号 WO1997004328(P1) 申请公布日期 1997.02.06
申请号 JP1996002016 申请日期 1996.07.19
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