| 摘要 |
<p>A buffer circuit includes a pair of pull-up output transistors (11, 13) and a pair of pull-down output transistors (15, 17) driving an output line (19, 20). Each output transistor is driven by its own tristate input translator (23, 25, 27, 29), all connected to an input terminal (22) of the circuit. Two of the translators (25, 29) are tristated by control signals (51, 52) received as feedback from the output line to turn off one of the pull-up transistors (13) when the output voltage exceeds the high logic level transition voltage (2.2 V) and to turn off one of the pull-down transistors (17) when the output drops below the low logic level transition voltage (0.8 V). This not only prevents ground bounce or overshoot of the output, but also avoids larger current flow or power dissipation from pull-up and pull-down transistors being simultaneously partially on during a transition.</p> |
