| 摘要 |
an encoder(1) encoding a multiplier and a multiplicand by performing a modified Booth's algorithm; a compression block(2) which separates vertical data output of the encoder(1) into three and performing an arithmetic operation in each three 9-2 compressor, and compresses by operating the sum output of each three 9-2 compressor in each one 6-2 compressor; and an add block(3) generating a multiplication output by summing the sum of the output of the compression block(2) in sum and carry group.
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